1. Field of the Invention
The present invention generally relates to digital electronics, and more particularly to a method of controlling the duty cycle of a signal.
2. Description of the Related Art
In digital electronics, the duty cycle of a signal is defined as the ratio of the pulse duration (the time the signal is logical high state) to the period of the waveform. For example, a perfect square wave would have a duty cycle of 50%, that is, it is in a high state for exactly half of the signal period. The concept of a duty cycle applies only to periodic signals.
For many high performance circuit applications, the duty cycle of a signal must be carefully controlled. While duty cycle control is valuable in many applications including dynamic logic circuits, analog circuits, arrays, etc., it is particularly important for clock supply circuits. A wide variety of duty cycle controllers have been devised including programmable controllers which allow a user or program interface to set the duty cycle using a digital input value, e.g., from 0-10, wherein an input value of 0 results in a 0% duty cycle and an input value of 10 results in a 100% duty cycle.